summaryrefslogtreecommitdiffstats
path: root/compiler/rustc_target/src/asm/mod.rs
diff options
context:
space:
mode:
Diffstat (limited to 'compiler/rustc_target/src/asm/mod.rs')
-rw-r--r--compiler/rustc_target/src/asm/mod.rs28
1 files changed, 26 insertions, 2 deletions
diff --git a/compiler/rustc_target/src/asm/mod.rs b/compiler/rustc_target/src/asm/mod.rs
index e60b8e78e..a11884bea 100644
--- a/compiler/rustc_target/src/asm/mod.rs
+++ b/compiler/rustc_target/src/asm/mod.rs
@@ -167,6 +167,7 @@ mod aarch64;
mod arm;
mod avr;
mod bpf;
+mod csky;
mod hexagon;
mod loongarch;
mod m68k;
@@ -184,6 +185,7 @@ pub use aarch64::{AArch64InlineAsmReg, AArch64InlineAsmRegClass};
pub use arm::{ArmInlineAsmReg, ArmInlineAsmRegClass};
pub use avr::{AvrInlineAsmReg, AvrInlineAsmRegClass};
pub use bpf::{BpfInlineAsmReg, BpfInlineAsmRegClass};
+pub use csky::{CSKYInlineAsmReg, CSKYInlineAsmRegClass};
pub use hexagon::{HexagonInlineAsmReg, HexagonInlineAsmRegClass};
pub use loongarch::{LoongArchInlineAsmReg, LoongArchInlineAsmRegClass};
pub use m68k::{M68kInlineAsmReg, M68kInlineAsmRegClass};
@@ -220,6 +222,7 @@ pub enum InlineAsmArch {
Avr,
Msp430,
M68k,
+ CSKY,
}
impl FromStr for InlineAsmArch {
@@ -238,8 +241,8 @@ impl FromStr for InlineAsmArch {
"powerpc64" => Ok(Self::PowerPC64),
"hexagon" => Ok(Self::Hexagon),
"loongarch64" => Ok(Self::LoongArch64),
- "mips" => Ok(Self::Mips),
- "mips64" => Ok(Self::Mips64),
+ "mips" | "mips32r6" => Ok(Self::Mips),
+ "mips64" | "mips64r6" => Ok(Self::Mips64),
"s390x" => Ok(Self::S390x),
"spirv" => Ok(Self::SpirV),
"wasm32" => Ok(Self::Wasm32),
@@ -248,6 +251,7 @@ impl FromStr for InlineAsmArch {
"avr" => Ok(Self::Avr),
"msp430" => Ok(Self::Msp430),
"m68k" => Ok(Self::M68k),
+ "csky" => Ok(Self::CSKY),
_ => Err(()),
}
}
@@ -272,6 +276,7 @@ pub enum InlineAsmReg {
Avr(AvrInlineAsmReg),
Msp430(Msp430InlineAsmReg),
M68k(M68kInlineAsmReg),
+ CSKY(CSKYInlineAsmReg),
// Placeholder for invalid register constraints for the current target
Err,
}
@@ -292,6 +297,7 @@ impl InlineAsmReg {
Self::Avr(r) => r.name(),
Self::Msp430(r) => r.name(),
Self::M68k(r) => r.name(),
+ Self::CSKY(r) => r.name(),
Self::Err => "<reg>",
}
}
@@ -311,6 +317,7 @@ impl InlineAsmReg {
Self::Avr(r) => InlineAsmRegClass::Avr(r.reg_class()),
Self::Msp430(r) => InlineAsmRegClass::Msp430(r.reg_class()),
Self::M68k(r) => InlineAsmRegClass::M68k(r.reg_class()),
+ Self::CSKY(r) => InlineAsmRegClass::CSKY(r.reg_class()),
Self::Err => InlineAsmRegClass::Err,
}
}
@@ -344,6 +351,7 @@ impl InlineAsmReg {
InlineAsmArch::Avr => Self::Avr(AvrInlineAsmReg::parse(name)?),
InlineAsmArch::Msp430 => Self::Msp430(Msp430InlineAsmReg::parse(name)?),
InlineAsmArch::M68k => Self::M68k(M68kInlineAsmReg::parse(name)?),
+ InlineAsmArch::CSKY => Self::CSKY(CSKYInlineAsmReg::parse(name)?),
})
}
@@ -371,6 +379,7 @@ impl InlineAsmReg {
Self::Avr(r) => r.validate(arch, reloc_model, target_features, target, is_clobber),
Self::Msp430(r) => r.validate(arch, reloc_model, target_features, target, is_clobber),
Self::M68k(r) => r.validate(arch, reloc_model, target_features, target, is_clobber),
+ Self::CSKY(r) => r.validate(arch, reloc_model, target_features, target, is_clobber),
Self::Err => unreachable!(),
}
}
@@ -397,6 +406,7 @@ impl InlineAsmReg {
Self::Avr(r) => r.emit(out, arch, modifier),
Self::Msp430(r) => r.emit(out, arch, modifier),
Self::M68k(r) => r.emit(out, arch, modifier),
+ Self::CSKY(r) => r.emit(out, arch, modifier),
Self::Err => unreachable!("Use of InlineAsmReg::Err"),
}
}
@@ -416,6 +426,7 @@ impl InlineAsmReg {
Self::Avr(r) => r.overlapping_regs(|r| cb(Self::Avr(r))),
Self::Msp430(_) => cb(self),
Self::M68k(_) => cb(self),
+ Self::CSKY(_) => cb(self),
Self::Err => unreachable!("Use of InlineAsmReg::Err"),
}
}
@@ -440,6 +451,7 @@ pub enum InlineAsmRegClass {
Avr(AvrInlineAsmRegClass),
Msp430(Msp430InlineAsmRegClass),
M68k(M68kInlineAsmRegClass),
+ CSKY(CSKYInlineAsmRegClass),
// Placeholder for invalid register constraints for the current target
Err,
}
@@ -463,6 +475,7 @@ impl InlineAsmRegClass {
Self::Avr(r) => r.name(),
Self::Msp430(r) => r.name(),
Self::M68k(r) => r.name(),
+ Self::CSKY(r) => r.name(),
Self::Err => rustc_span::symbol::sym::reg,
}
}
@@ -488,6 +501,7 @@ impl InlineAsmRegClass {
Self::Avr(r) => r.suggest_class(arch, ty).map(InlineAsmRegClass::Avr),
Self::Msp430(r) => r.suggest_class(arch, ty).map(InlineAsmRegClass::Msp430),
Self::M68k(r) => r.suggest_class(arch, ty).map(InlineAsmRegClass::M68k),
+ Self::CSKY(r) => r.suggest_class(arch, ty).map(InlineAsmRegClass::CSKY),
Self::Err => unreachable!("Use of InlineAsmRegClass::Err"),
}
}
@@ -520,6 +534,7 @@ impl InlineAsmRegClass {
Self::Avr(r) => r.suggest_modifier(arch, ty),
Self::Msp430(r) => r.suggest_modifier(arch, ty),
Self::M68k(r) => r.suggest_modifier(arch, ty),
+ Self::CSKY(r) => r.suggest_modifier(arch, ty),
Self::Err => unreachable!("Use of InlineAsmRegClass::Err"),
}
}
@@ -548,6 +563,7 @@ impl InlineAsmRegClass {
Self::Avr(r) => r.default_modifier(arch),
Self::Msp430(r) => r.default_modifier(arch),
Self::M68k(r) => r.default_modifier(arch),
+ Self::CSKY(r) => r.default_modifier(arch),
Self::Err => unreachable!("Use of InlineAsmRegClass::Err"),
}
}
@@ -575,6 +591,7 @@ impl InlineAsmRegClass {
Self::Avr(r) => r.supported_types(arch),
Self::Msp430(r) => r.supported_types(arch),
Self::M68k(r) => r.supported_types(arch),
+ Self::CSKY(r) => r.supported_types(arch),
Self::Err => unreachable!("Use of InlineAsmRegClass::Err"),
}
}
@@ -607,6 +624,7 @@ impl InlineAsmRegClass {
InlineAsmArch::Avr => Self::Avr(AvrInlineAsmRegClass::parse(name)?),
InlineAsmArch::Msp430 => Self::Msp430(Msp430InlineAsmRegClass::parse(name)?),
InlineAsmArch::M68k => Self::M68k(M68kInlineAsmRegClass::parse(name)?),
+ InlineAsmArch::CSKY => Self::CSKY(CSKYInlineAsmRegClass::parse(name)?),
})
}
@@ -630,6 +648,7 @@ impl InlineAsmRegClass {
Self::Avr(r) => r.valid_modifiers(arch),
Self::Msp430(r) => r.valid_modifiers(arch),
Self::M68k(r) => r.valid_modifiers(arch),
+ Self::CSKY(r) => r.valid_modifiers(arch),
Self::Err => unreachable!("Use of InlineAsmRegClass::Err"),
}
}
@@ -826,6 +845,11 @@ pub fn allocatable_registers(
m68k::fill_reg_map(arch, reloc_model, target_features, target, &mut map);
map
}
+ InlineAsmArch::CSKY => {
+ let mut map = csky::regclass_map();
+ csky::fill_reg_map(arch, reloc_model, target_features, target, &mut map);
+ map
+ }
}
}